Name: Electronic Components FPGA Kintex7 Family 162240 Cells 28nm Technology 1V 676Pin BGA XC7K160T2FFG676I IC
Brand: Xilinx
Price: 1 USD

Electronic Components FPGA Kintex-7 Family 162240 Cells 28nm Technology 1V 676-Pin BGA XC7K160T-2FFG676I Integrated Circuits

Description :

Xilinx 7 series FPGAs comprise three new FPGA families that address the complete range of system requirements, ranging from low cost, small form factor, cost-sensitive, high-volume applications to ultra high-end connectivity bandwidth, logic capacity, and signal processing capability for the most demanding high-performance applications. The 7 series FPGAs include:

Built on a state-of-the-art, high-performance, low-power (HPL), 28 nm, high-k metal gate (HKMG) process technology, 7 series FPGAs enable an unparalleled increase in system performance with 2.9 Tb/s of I/O bandwidth, 2 million logic cell capacity, and 5.3 TMAC/s DSP, while consuming 50% less power than previous generation devices to offer a fully programmable alternative to ASSPs and ASICs.

Advanced high-performance FPGA logic based on real 6-input lookup table (LUT) technology configurable as distributed memory.
36 Kb dual-port block RAM with built-in FIFO logic for on-chip data buffering.
High-performance SelectIO technology with support for DDR3 interfaces up to 1,866 Mb/s.
High-speed serial connectivity with built-in multi-gigabit transceivers from 600 Mb/s to maximum rates of 6.6 Gb/s up to 28.05 Gb/s, offering a special low-power mode, optimized for chip-to-chip interfaces.
A user configurable analog interface (XADC), incorporating dual 12-bit 1MSPS analog-to-digital converters with on-chip thermal and supply sensors.
DSP slices with 25 x 18 multiplier, 48-bit accumulator, and pre-adder for high-performance filtering, including optimized symmetric coefficient filtering.
Powerful clock management tiles (CMT), combining phase-locked loop (PLL) and mixed-mode clock manager (MMCM) blocks for high precision and low jitter.
Integrated block for PCI Express (PCIe), for up to x8 Gen3 Endpoint and Root Port designs.
Wide variety of configuration options, including support for commodity memories, 256-bit AES encryption with HMAC/SHA-256 authentication, and built-in SEU detection and correction.
Low-cost, wire-bond, lidless flip-chip, and high signal integrity flipchip packaging offering easy migration between family members in the same package. All packages available in Pb-free and selected packages in Pb option.
Designed for high performance and lowest power with 28 nm, HKMG, HPL process, 1.0V core voltage process technology and 0.9V core voltage option for even lower power.

	Description	Value
	Device Logic Cells	162,240
	Device Logic Units	101,400
	In System Programmability	Yes
	Maximum Number of User I/Os	250
	Maximum Operating Supply Voltage	1.03 V
	Minimum Operating Supply Voltage	0.97 V
	Mounting	Surface Mount
	Number of Registers	202,800
	Operating Temperature	-40 to 100 °C
	Pin Count	676
	Product Dimensions	27 x 27 x 1.73 mm
	RAM Bits	11,980,800 Bit
	Re-programmability Support	1
	Screening Level	Industrial
	Speed Grade	2
	Supplier Package	BGA
	Typical Operating Supply Voltage	1.0000 V

Electronic Components FPGA Kintex-7 Family 162240 Cells 28nm Technology 1V 676-Pin BGA XC7K160T-2FFG676I IC

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