74HC273N Flip Flop D-Type Bus Interface Pos-Edge 1-Element 20-Pin PDIP Bulk
Description:
The SNx4HC273d evices are positive-edge-triggered D-type flip-flops with a direct active low clear (CLR) input.
Informationat the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the
positive-going edge of the clock (CLK) pulse.Clock triggering occurs at a particular voltage level and is not related
directly to the transition timeof the positive-going pulse.When CLK is at either the high or low level, the D input
has no effect at the output.
Technical Information :
The 74HC273; 74HCT273 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and master reset inputs.
The outputs Qn will assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the
LOW-to-HIGH clock (CP) transition. A LOW on master reset forces the outputs LOW independently of clock and data inputs.
Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
- Input levels:
- For 74HC273: CMOS level
- For 74HCT273: TTL level
- Common clock and master reset
- Eight positive edge-triggered D-type flip-flops
- Complies with JEDEC standard no. 7A
- ESD protection:
- HBM JESD22-A114F exceeds 2000 V
- MM JESD22-A115-A exceeds 200 V.
- Multiple package options
- Specified from -40 °C to +85 °C and from -40 °C to +125 °C
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